Q-Memory Photonic Quantum Processor
A CMOS-compatible silicon quantum processor that runs at room temperature — delivering programmable linear optical quantum computing, AI matrix acceleration at the speed of light
- particle of light
- grid of adjustable mirrors
- photons permanently linked
The Power of Q-Memory
How Q-Memory Delivers Results — Step by Step
Fire a particle of light
Like flipping a coin and placing it face-down — you know it's there but haven't looked at it yet.
Steer it through a grid of adjustable mirrors
The photon travels along glass channels thinner than a spider's silk thread.
Make two photons permanently linked
When two photons arrive at the same mirror at exactly the same instant, quantum physics forces them to entangle
Catch the photon
At the exit, a detector cooled catches each photon
Act on the result
The detection result feeds back into the chip within 10 nanoseconds
Compare Quantum Technology
Features
Quantum technology comparison
Q-memory
Others
Waveguide loss
0.5 dB/m SiN — 400× less than silicon
Silicon: 2 dB/cm > higher
Chip operating temp.
Room temperature — detector 2.2 K only
Most: 15 mK dilution fridge
AI revenue mode
Same chip runs AI matrix multiply — 100× less energy than GPU
None of the 15 photonic QC competitors have an AI acceleration product
Dual-mode architecture
Quantum circuits + AI matmul — software toggle, zero hardware change
All others are single-purpose
PCM zero-power memory
140M cycles · 0 W idle · locks AI weights & quantum phase
No other photonic QC company has non-volatile phase memory
Quantum data centre
40 kW replaces 2 MW GPU cluster · rack system
No competitor has articulated
Gate speed
>1 GHz photon rate · <10 ns feed-forward
Ion trap: 1–10 kHz · Neutral atom: 100 Hz–1 kHz
The Minds Behind Q-Memory
Yucel Zengin
CEO
23+ years software engineering · Certified Cloud Architect. Previously Sony R&D — vision AI cameras. Deep expertise in AI/ML, IIoT, digital twins. Conceived the CMOS photonic quantum chip programme and T3 Perceval simulation
Abhinav Bharti
CTO
25+ years in hardware and embedded systems. Previously Sony R&D — intelligent imaging. Expertise in AI/ML, IIoT, FPGA firmware. Leads photonic chip hardware integration, control firmware, and test equipment interfacing
Yves Christian Nonguierma PhD
Lead Quantum Physicist
PhD in experimental quantum optics or photonic QC. Leads HOM experiment design, photon source characterisation (SPDC/QD)
Marina Macias PhD
Expert Advisor -Materials Science & Energy
20+ years R&D in materials development, advanced microscopy, spectroscopy, and structural validation of complex material systems for energy and industrial applications. Inventor of characterisation and testing methodologies for deep-tech hardware.
No Power Wasted Holding the Chip Still
Typically, mirrors require a steady supply of electricity to maintain their position—similar to keeping your foot on the gas pedal to maintain a constant speed. However, we use a unique material that can hold its setting without needing any continuous power. In a chip with 256 mirrors, this can save 490 watts, which is equivalent to turning off 40 desk lamps that have been on all day just to keep the chip stable.
One Chip — Two Ways to Generate Functions
The same mirror network that runs quantum calculations also runs the maths behind every AI model — at the speed of light, using roughly 100× less electricity than a classic GPU. If the quantum product takes longer than expected, the AI acceleration product still generates output.
Use Cases & Applications
From today’s lab demonstrations to tomorrow’s fault-tolerant quantum advantage
Quantum ML — Predictions from Noise
Traditional AI systems often require tens of thousands of training examples to recognize and learn complex patterns. In contrast, our 64-mode photonic chip achieves comparable learning performance using as few as 70 samples — dramatically reducing training time, energy consumption, and computational overhead.
Quantum Data Centre — Rack-Scale Photonic Computing
Today’s AI data centres running large language models draw 2 MW per compute cluster — that is, roughly 2,800 high-end server GPUs running flat-out, burning enough electricity to power 2,000 family homes around the clock. A rack of 32 Phase 3 photonic processors does the same matrix work using just 40 kW
The Quantum Internet
The same chip routes quantum logic gates and distributes entangled photon pairs across fibre at 1550 nm — the wavelength existing telecoms infrastructure already carries. The model is validated, heralded entanglement between two quantum memory nodes over fibre with 15× temporal multiplexing at 510 coincidences/s — the exact architecture this chip interconnects.
Unbreakable Communications
Entangled photon pairs generated on-chip create encryption keys that obey the laws of physics — any eavesdropper disturbs the quantum state and is instantly detected. The paper demonstrated integrated photonic QKD that exceeded the PLOB repeaterless bound over 370 km of fibre using this exact chip platform.
Powerful Integrations & Layers