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Programmable light processors, built for the quantum era.

Q-Memory designs programmable, room-temperature photonic processors: chips that steer and mix light under software control. We build them for quantum research labs today and quantum data centers tomorrow, with an AI mode on the same chip.

Try the simulatorFollow our progress

Light inResultTunable interferometers
How a programmable photonic processor works. Software sets each tunable interferometer, so the same chip performs a different operation, reconfigured in software. An illustration of the principle.

What we are building

A photonic processor is a network of tiny light paths on a chip. Where paths meet, a tunable interferometer decides how much light goes each way. Set all of them from software and the chip performs a chosen operation on the light passing through. Change the settings and it performs a different one, on the same chip.

Room temperature

The processor chip runs at room temperature. Single-photon detectors, where an experiment uses them, sit in a compact cooler.

Programmable

One chip, many experiments, reconfigured in software.

Made with chip-industry methods

Wafer-scale lithography on a low-loss material that is well established for photonics.

VION in your browser

VION is our four-channel programmable mesh, the proof of concept we are building now. Our online simulator runs the same design, so you can program it before the hardware exists.

  • Set each phase shifter and watch the light re-route through the mesh.
  • Pick a target operation and let the simulator program the chip to match it.
  • Swap lasers, photon sources and detectors on a virtual lab bench.
  • Try a new virtual chip: each one carries its own fabrication imperfections.

Try the simulatorSee what it does

The VION simulator: light from a laser travels through a mesh of six tunable interferometers to four detectors, with phase settings on the left and detected light and the transfer map on the right.

A memory layer for light

Today’s programmable photonic chips hold each setting by continuously heating a small part of the chip. That costs power, produces heat, and makes the chip drift.

Our memory layer (patent filed) is designed to hold settings at near-zero power, for processors that are more stable and lower-power, which matters when many chips share a rack.

Where the work stands

A rendering of VION: six identical interferometer cells on a metal backplane, joined by optical fibre, with four fibre connectors in on the left and four out on the right.
VION, our fibre-mesh proof of concept, as designed. Six identical cells on a backplane, light in standard fibre.

VION is being built in-house for November 2026. VION+, our first chip, follows from CORNERSTONE’s foundry run in Q2 2027. AXIOM, the product, follows in two versions: AXIOM-B in Q3 2027 and AXIOM-D in Q4 2027.

4

light channels in VION, our fibre-mesh proof of concept

Design

6

light channels in VION+, our first foundry chip

Design

June 2026

UK patent application filed.

On record

Every figure on this site says how we know it.

Design
A property of our design.
On record
A matter of public record.

A roadmap built on measured results

Each phase builds on measured results from the one before, so every step rests on proven performance.

  1. VION: our fibre-mesh proof of concept

    A four-channel programmable mesh built in-house from catalogue parts, with the light in standard fibre. It proves our electronics, calibration and measurement chain.

  2. VION+: our first chip

    A six-channel chip from a commercial foundry, on the process AXIOM will use. It carries the quantum tests: two-photon interference and a two-photon logic gate.

  3. AXIOM: one chip for quantum and AI

    A sixteen-path programmable processor that runs quantum circuits, quantum machine learning and an AI mode on the same chip. AXIOM-B is the base processor; AXIOM-D adds photon sources and detectors in one rack.

  4. XYRON and beyond: toward quantum data centers

    The hardware after AXIOM, in the same two versions, and classical optical processing on the same platform.

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