From a plan to hardware, step by step.
Q-Memory was planned in April 2026 as memory for quantum chips. By the end of 2027 the plan reaches AXIOM, a programmable light processor in a standard rack, as AXIOM-B and AXIOM-D, and by Q3 2028 XYRON, the hardware after it. This page shows every step between, what is done, and what each step has to prove.
Where the light has reached
One line, from the first plan to XYRON. Filled stops are done; open stops are planned.
- Apr 2026Project plannedDone
- Jun 2026Company formedDone
- Jun 2026UK patent filedDone
- Oct 2026Simulator publishedDone
- Oct 2026Digital twin builtDone
- Nov 2026VION proof of conceptPlanned
- Q1–Q2 2027VION+ chipPlanned
- Q3 2027AXIOM-BPlanned
- Q4 2027AXIOM-DPlanned
- Q2 2028XYRON-BPlanned
- Q3 2028XYRON-DPlanned
By track
Six tracks run in parallel. The company and its patent came first, then the software. The hardware goes in three steps: VION proves our control chain in fibre, VION+ proves the foundry process on a chip, and AXIOM is the product. XYRON is the hardware after it, as XYRON-B and XYRON-D.
A filled mark is done and an open ring is planned. The yellow line is today.
The product line
Each piece of hardware is specified on measured results from the one before it. The digital twin runs each chip design in software first, so every chip we order has already been tested.
Every milestone
| When | Milestone | Area | Status |
|---|---|---|---|
| Apr 2026 | Q-Memory project planned, designed as memory for quantum chips | Project | Done |
| Jun 2026 | Q-Memory becomes a limited company | Company | Done |
| Jun 2026 | UK patent application filed, 15 June 2026 | Intellectual property | Done |
| Oct 2026 | Q-Memory simulation software published | Software | Done |
| Oct 2026 | Digital twin completed: the chip designs are tested in software before they are built | Software | Done |
| Nov 2026 | VION fibre-mesh proof of concept: cells, backplane, sixteen-channel driver and calibration software, gates B1 to B5 | Hardware, VION | Planned |
| Q1–Q2 2027 | VION+ chip: six-channel mesh with a two-photon gate, on CORNERSTONE’s silicon-nitride multi-project wafer run #14. Design in Q1 2027, chips measured in Q2 2027 | Hardware, VION+ | Planned |
| Q3 2027 | AXIOM-B, the base processor: sixteen paths in four rack units, three modes (quantum, quantum machine learning, AI). The customer brings photon sources and detectors | Hardware, AXIOM | Planned |
| Q4 2027 | AXIOM-D, the data-centre system: AXIOM-B with photon sources, single-photon detectors, a time-tagger and a server in one rack | Hardware, AXIOM | Planned |
| Q2 2028 | XYRON-B, the XYRON base processor | Hardware, XYRON | Planned |
| Q3 2028 | XYRON-D, the XYRON data-centre system | Hardware, XYRON | Planned |
What each step has to prove
A step is done when it passes its acceptance gates. The gates are targets today; we publish the measured results as they come in.
VION, November 2026
The fibre-mesh proof of concept passes when our own electronics and software can set it, hold it and measure it.
| Gate | Question it answers | Goal |
|---|---|---|
| B2 Crosstalk | When one setting changes, how much do the others move? | < 2 % of π (target) |
| B3 Accuracy | When we ask for an operation, how close does the mesh get? | < 2% (target) |
| B4 Stability | How long does it hold a setting? | 30 min (target) |
| B5 Speed | How fast does it switch between two settings? | < 10 s (target) |
Marks beside the figures:
- Target
- What we are aiming for.
AXIOM’s gates are set once VION+ has measured results.